1. Field of the Invention
The present invention relates to a test coupon which is configured to be used to evaluate characteristics of multi-layer printed wiring boards.
2. Discussion of the Background
A conventional test coupon 51 in the printed wiring board is, as shown in FIG. 14, provided separably in a protruding condition on an edge of a printed wiring boards 52. A plurality of through holes 53, 54 are formed along both edges of the test coupon 51. Directions 55, 56 of arrays of the through holes 53, 54 are set in parallel to each other and also orthogonal to the edge of the test coupon 51. Between the arrays of the through holes 53, 54, a plurality of conductor patterns 57 each of which extends in a direction orthogonal to the directions of the arrays of the through holes 53, 54 (as indicated by an arrow 58 in FIG. 14) are provided in parallel.
However, in the test coupon in the conventional printed wiring board, the direction 55, 56 of the arrays of the through holes 53, 54 crosses perpendicular to a direction 58 in which the conductor patterns 57 are elongated. Therefore, the test coupon 51 increases in size toward a direction of getting away from the edge of the printed wiring boards 52 in proportion to the number of the through holes 53, 54. Consequently, there arises a problem that a projection length of the test coupon 51 to the printed wiring boards 52 becomes long, and hence the whole of the printed wiring boards 52 and the test coupon 51 becomes large-sized.
According to one aspect of the invention, a test coupon is configured to be provided in a coupon area defined separately from a wiring board area where multi-layer printed wiring boards are arranged and configured to be used to evaluate characteristics of the multi-layer printed wiring boards which have a tested wiring layer. The test coupon includes a multi-layer substrate forming the coupon area. The multi-layer substrate includes at least first and second wiring layers, first and second through hole groups, a first conductor pattern and a second conductor pattern. The first wiring layer is configured to correspond to the tested wiring layer on which a wiring whose characteristics are to be evaluated is provided. The second wiring layer is configured to correspond to another wiring layer of the multi-layer printed wiring boards. Each of first and second through hole groups has a plurality of through holes which pass through the multi-layer substrate and which are arranged in an arranging direction. A first conductor pattern is provided on the first wiring layer and electrically connecting a first through hole of the first through hole group and a second through hole of the second through hole group. A second conductor pattern is provided on the second wiring layer and electrically connecting a third through hole of the first through hole group and a fourth through hole of the second through hole group. The first and second conductor patterns extend substantially along the arranging direction.